/** @file
 *
 *  Copyright (c) 2023-2025, Mario Bălănică <mariobalanica02@gmail.com>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
 **/

#ifndef __VARSTORE_DATA_H__
#define __VARSTORE_DATA_H__

#include <RockchipDisplay.h>

#pragma pack (1)

#define CPU_PERF_CLUSTER_CLOCK_PRESET_BOOTDEFAULT  0
#define CPU_PERF_CLUSTER_CLOCK_PRESET_MIN          1
#define CPU_PERF_CLUSTER_CLOCK_PRESET_MAX          2
#define CPU_PERF_CLUSTER_CLOCK_PRESET_CUSTOM       3
typedef struct {
  UINT32    Preset;
} CPU_PERF_CLUSTER_CLOCK_PRESET_VARSTORE_DATA;

typedef struct {
  UINT32    Mhz;
} CPU_PERF_CLUSTER_CLOCK_CUSTOM_VARSTORE_DATA;

#define CPU_PERF_CLUSTER_VOLTAGE_MODE_AUTO    0
#define CPU_PERF_CLUSTER_VOLTAGE_MODE_CUSTOM  1
typedef struct {
  UINT32    Mode;
} CPU_PERF_CLUSTER_VOLTAGE_MODE_VARSTORE_DATA;

typedef struct {
  UINT32    Microvolts;
} CPU_PERF_CLUSTER_VOLTAGE_CUSTOM_VARSTORE_DATA;

#define COMBO_PHY_MODE_UNCONNECTED  0
#define COMBO_PHY_MODE_PCIE         1
#define COMBO_PHY_MODE_SATA         2
#define COMBO_PHY_MODE_USB3         3
typedef struct {
  UINT32    Mode;
} COMBO_PHY_MODE_VARSTORE_DATA;

#define PCIE30_STATE_DISABLED  0
#define PCIE30_STATE_ENABLED   1
typedef struct {
  UINT32    State;
} PCIE30_STATE_VARSTORE_DATA;

#define PCIE30_PHY_MODE_AGGREGATION  4
#define PCIE30_PHY_MODE_NANBNB       0
#define PCIE30_PHY_MODE_NANBBI       1
#define PCIE30_PHY_MODE_NABINB       2
#define PCIE30_PHY_MODE_NABIBI       3
typedef struct {
  UINT8    Mode;
} PCIE30_PHY_MODE_VARSTORE_DATA;

#define CONFIG_TABLE_MODE_ACPI      0x00000001
#define CONFIG_TABLE_MODE_FDT       0x00000002
#define CONFIG_TABLE_MODE_ACPI_FDT  0x00000003
typedef struct {
  UINT32    Mode;
} CONFIG_TABLE_MODE_VARSTORE_DATA;

#define ACPI_PCIE_ECAM_COMPAT_MODE_SINGLE_DEV         0x00000001
#define ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6             0x00000002
#define ACPI_PCIE_ECAM_COMPAT_MODE_GRAVITON           0x00000004
#define ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_SINGLE_DEV  0x00000003
#define ACPI_PCIE_ECAM_COMPAT_MODE_NXPMX6_GRAVITON    0x00000006
typedef struct {
  UINT32    Mode;
} ACPI_PCIE_ECAM_COMPAT_MODE_VARSTORE_DATA;

#define FDT_COMPAT_MODE_UNSUPPORTED  0
#define FDT_COMPAT_MODE_VENDOR       1
#define FDT_COMPAT_MODE_MAINLINE     2
typedef struct {
  UINT32    Mode;
} FDT_COMPAT_MODE_VARSTORE_DATA;

typedef struct {
  UINT8    State;
} FDT_FORCE_GOP_VARSTORE_DATA;

typedef struct {
  UINT8    State;
} FDT_SUPPORT_OVERRIDES_VARSTORE_DATA;

#define FDT_OVERRIDE_PATH_MAX_LEN   254
#define FDT_OVERRIDE_PATH_MAX_SIZE  255
typedef struct {
  CHAR16    Path[FDT_OVERRIDE_PATH_MAX_SIZE];
} FDT_OVERRIDE_PATH_VARSTORE_DATA;

#define COOLING_FAN_STATE_DISABLED  0
#define COOLING_FAN_STATE_ENABLED   1
typedef struct {
  UINT32    State;
} COOLING_FAN_STATE_VARSTORE_DATA;

typedef struct {
  UINT32    Percentage;
} COOLING_FAN_SPEED_VARSTORE_DATA;

#define USBDP_PHY_USB3_STATE_DISABLED  0
#define USBDP_PHY_USB3_STATE_ENABLED   1
typedef struct {
  UINT32    State;
} USBDP_PHY_USB3_STATE_VARSTORE_DATA;

typedef struct {
  UINT64    Value;
} DEBUG_SERIAL_PORT_BAUD_RATE_VARSTORE_DATA;

#define DISPLAY_MODE_NATIVE  0x80000000
#define DISPLAY_MODE_CUSTOM  0x80000001
//
// Keep in sync with LcdGraphicsOutputDxe/DisplayModes.c table.
//
#define DISPLAY_MODE_640_480_60    0
#define DISPLAY_MODE_800_600_60    1
#define DISPLAY_MODE_1024_768_60   2
#define DISPLAY_MODE_1152_864_60   3
#define DISPLAY_MODE_1280_720_60   4
#define DISPLAY_MODE_1280_768_60   5
#define DISPLAY_MODE_1280_800_60   6
#define DISPLAY_MODE_1280_960_60   7
#define DISPLAY_MODE_1280_1024_60  8
#define DISPLAY_MODE_1360_768_60   9
#define DISPLAY_MODE_1400_1050_60  10
#define DISPLAY_MODE_1440_900_60   11
#define DISPLAY_MODE_1600_900_60   12
#define DISPLAY_MODE_1600_1200_60  13
#define DISPLAY_MODE_1680_1050_60  14
#define DISPLAY_MODE_1920_1080_60  15
#define DISPLAY_MODE_1920_1200_60  16
#define DISPLAY_MODE_2048_1152_60  17
#define DISPLAY_MODE_2560_1080_60  18
#define DISPLAY_MODE_2560_1440_60  19
#define DISPLAY_MODE_2560_1600_60  20
#define DISPLAY_MODE_3440_1440_60  21
#define DISPLAY_MODE_3840_2160_30  22
#define DISPLAY_MODE_3840_2160_60  23
#define DISPLAY_MODE_4096_2160_30  24
#define DISPLAY_MODE_4096_2160_60  25
typedef struct {
  UINT32    Preset;
} DISPLAY_MODE_PRESET_VARSTORE_DATA;

typedef struct {
  UINT32    Order[VOP_OUTPUT_IF_NUMS];
} DISPLAY_CONNECTORS_PRIORITY_VARSTORE_DATA;

#define HDMI_SIGNALING_MODE_AUTO  0
#define HDMI_SIGNALING_MODE_DVI   1
#define HDMI_SIGNALING_MODE_HDMI  2

#pragma pack ()

#endif // __VARSTORE_DATA_H__
